Leading provider of high performance MIL-STD-1553 databus IP Cores, FPGA bus controller and remote terminal, for the avionics, aerospace & military markets

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The future of 1553 is in IP cores. Click here to learn why.


 

MIL-STD-1553 BC/RT/MT Intellectual Property Core for FPGA and ASIC

 

MIL-STD-1553B Notice 2 Bus Controller, Remote Terminal, Bus monitor IP Core for FPGA and ASIC Devices

 

The BRM1553D IP Core is suitable for any Mil-Std-1553 implementation. The core incorporates a backend logic that arranges the messages in a predefined memory and registers structure, which simplifies the interface between the 1553 bus and the local CPU. The BRM1553D core can act as a replacement (2nd source) for DDC® Enhanced MINI-ACE® devices as the data is arranged in the same way.

 

Feature Summary:

  • Mil-Std-1553 Intellectual Property for FPGAs and ASIC
  • Suitable for any MIL-STD-1553 BC, RT, MT implementation
  • Compatible to DDC® ACE® and Enhanced MINI-ACE® interface and functionality, works with existing software drivers
  • Eliminates risks related to parts obsolescence
  • Small FPGA area utilization
  • Supports any even clock frequency
  • Modular architecture allowing flexible implementations
  • Provided with full verification environment
  • Passed full RT validation testing by 3rd party
  • Based on vendor and technology independent VHDL code

 

Back End Interface

Includes DDC® Enhanced MINI-ACE® interface, compatible with existing drivers and applications.

  • No need to rewrite drivers' code
  • Eliminates replacement risk

 

Gate Count

Sital's BRM1553D requires very small space from FPGA.
The following table shows examples of the area usage, in different FPGA devices:
 
 VendorProduct FamilyArea Usage (4-LUT count)
BC+RT+MTRT Only
 AlteraStratix33262257
Cyclone33302261
 XilinxVirtex-II30202066
Spartan 330172063
* These numbers are approximate.
* Other FPGA vendors and families are available
* Actual area usage may vary according to core configuration.

 

Manchester Decoder

The unique Manchester decoder can work with any even clock frequency from 12Mhz and up to reduce clock sources and clock domains on board (reduces EMI/RFI).
Advanced algorithms for filtering out noise and disturbances enable the core to operate in harsh environments.

 

Transceivers

Sital Technology's 1553 BC core connects to any standard transceiver-transformer pair. The core was fully validated with a 3rd party dual transceiver.

 

* DDC® and MINI-ACE® are registered trademarks of Data Device Corporation, Bihemia, NY, USA. There is not any affiliation between Data Device Corporation and Sital technology, Ltd.

 
 

 
 
 
Download:
Product Brochure
Product Selection Guide
White Paper:
The Evolution of
Mil-Std-1553 IP Cores

 
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