MIL-STD-1553 Terminal, Bus Controller and Monitor Extended Reliability IP
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MIL-STD-1553B Notice 2 Remote Terminal and Bus Controller, Extended Reliability, IP Core for FPGA Devices
The BC/RT 1553ERL IP Core is suitable for High Reliability Mil-Std-1553 implementations, such as space applications.
The IP core can come is several configurations such as RT and BC, and several interfaces - Front End or DDC® Enhanced MINI-ACE® Compatible.
Feature Summary:
- Extended Reliability State machine, suitable for space applications
- Mil-Std-1553 Intellectual Property for FPGAs and ASIC
- Suitable for any MIL-STD-1553 RT or BC implementation
- Very small FPGA area utilization
- Supports any Rad.-Hard FPGA
- Supports any even clock frequency
- Does not require CPU for management, no SW required
- Modular architecture allowing flexible implementations
- Provided with extended verification environment
- Passed full validation testing by 3rd party
- Eliminates risks related to parts obsolescence
- Based on vendor and technology independent VHDL code
Back End Interface
The RT1553ERL can come in different interfaces:
Gate Count
Sital's MIL-STD-1553 IP requires very small space from FPGA. The following table shows examples of the area usage, in different FPGA devices:
| Vendor | Family | Area Usage (4-LUT count) |
| Altera | Stratix, Cyclone | 930 |
| Xilinx | Virtex-II, Spartan 3 | 805 |
| Lattice | LatticeXP | 764 |
| QuickLogic | PolarPro | 1059 |
| Actel | RTAX-S | 1036 Modules |
* Other FPGA vendors and families are available
* Actual area usage may vary according to core configuration.
Manchester Decoder
TThe unique Manchester decoder can work with any even clock frequency from 12Mhz and up to reduce
clock sources and clock domains on board (reduces EMI/RFI).
Advanced algorithms for filtering out noise
and disturbances enable the core to operate in harsh environments.
Transceivers
Sital Technology's 1553 RT core connects to any standard transceiver-transformer pair. The core was fully validated with a 3rd party dual transceiver.
RT Validation
Sital Technology's 1553 RT core has been successfully implemented in a 3rd party FPGA, and has passed the full MIL-STD-1553B Notice 2 RT Validation test plan in an independent laboratory.
* DDC® and MINI-ACE® are registered trademarks of Data Device Corporation, Bihemia, NY, USA. There is not any affiliation between Data Device Corporation and Sital technology, Ltd.